Nice post! Let's get to work on this.
I see JohnF slipped in while I was writing this and he's saying use much larger bootstrap caps. I guess we don't disagree, actually, but what I'm saying is .1u gets it if the fets aren't so huge (verified this with scope), so we are really both saying "match to the fets you're driving". He's raising the caps, I'm saying use smaller fets -- same idea, actually, but tempered with the fact that even with big caps, the chip can only do so much output current, and too big caps into too big a load just bakes the chip instead, or maybe gives you a too slow initial charge up. They do need to be high quality, low ESR caps no matter what.
You are going to need to be able to apply a scope to tune some of this stuff, so the first thing you need to do for a direct-rails supply is to have an isolation transformer so you can temporarily ground the negative rail of the big input DC supply and see gate drives and bottom fet drain waveforms -- in general, you're going to have to assume that the high side waves are the same, as trying to ground the scope to a bridge output point is futile most times due to emi issues. Without that, you're going to be constantly in the dark about what is going on.
I have been known to float the scope off ground, but not only is that dangerous as heck, there are always some parasitic couplings that find their way into the waveforms you see so it's not telling the truth anymore anyway. You can ditch the iso transformer once it all works of course. Good thing to have around for things running right off the mains when it's time to fix or tune them though.
Yes, I think your fets are probably too big for this particular chip to drive, or on the edge. Adding resistance in the gates slows down those waveforms and decreases dead time, as it slows down the turnoff seemingly more than the turn on (but that depends on the drain waveform). It's a tradeoff, because of the miller capacity (usually expressed as a charge number rather than a capacity, since the effect depends on drain volts/second and capacity, which obviously varies with drain voltage supply -- and other things, like what the load is doing just then).
What happens if the R's are too big is you start to see a glitch on the gate drive at the gate, right when the drain volts switch, which can take an off-going fet back on, or an on-turning fet back off for a little while. This is VERY bad for the fets, and is likely your main problem. From my experience with high current fets (lower volts, though) the resistors you show are much too large, and you'll have that problem with them. For reference, the fets I use are irfp 450's for high voltages, irfp 264 for somewhat lower voltages, and irfp048 for real low voltages. The middle one works best here, but then I'm running off 120v mains and not using voltage doubling on the mains supply.
I am in general shooting for under 1 kw net supply output, as a fusor really can't handle more than about half that without some serious liquid cooling of the tank anyway, and with 400-500w input I'm getting into the multiple millions neutrons/second, about my lab safety limit these days -- and that's at a "mere" 50kv HV input, it's going up in output and Q as I go higher in volts and lower in current and gas pressure with no slowing down or peak in sight yet. Which is why my nifty Spellman 50kv supply is going to be used for something else and a new higher voltage supply is getting built. The 2.5kw Spellman is way way overkill (deliberate on my part, so I could be really sure), you just can't use that much power. Running up the gas pressure to get the current up to what it can do doesn't make any more fusion than you get at 10 ma or so. In fact, you get less due to more useless collisions with stray neutrals and so forth, rather than head on ones.
I am right now building almost this exact same supply as you, Jon! It will be 120kv max, probably less in real life under load -- this is a
good thing, we can share what we find out and run into pretty well. This won't be my first, by a long way, but it will be the highest voltage and largest magnetics I've done -- the transformer is most of a cubic foot. Initial results with just one stack stage (but large loads) are looking really good with this circuit. I am taking a little extra time due to the high voltage it's going to make to build a nice large box with fans and shielding and all that so I won't get killed by the kilowatt, but early bench tests are looking real good. I've run it to near full power and even in arcing conditions, no problems. Nice!
I use resistors in the ~20 ohm range with the '264's FWIW. Sometimes zero R if I'm not having oscillation problems (but this makes the chip get hot), this is PCB layout-dependent as heck, which is one reason they don't give an easy cookbook equation for it. For lower current fets (eg lower capacities and charges) you can go up a bit, for larger ones, go down in R. At some point, the chip just won't switch them fast enough, or that gate glitch will re-appear, and at that point, we have to go to some different fet driver plan. This chip is for KW and under kinds of things, not multiple KW, in my experience.
However, there are some really robust fet/igbt drivers out there (I can suggest a few) that will do serious amps peaks, but none that float -- at that point you have to go to something like a gate transformer drive circuit with a few passives up on the fet side to control rise and fall times, and some other way to adjust dead time. We can discuss that if it becomes necessary, but I think it might not be here. At least not yet. I don't know of any fat-driver chips that have the nice floating drive for top-half fets, you have to manage that outside the chips in that case.
The bootstrap caps can all be .1uf. Beware of some low volt ceramics that stop acting like true capacitors when used over their voltage ratings (Joe Sousa uses those as variable impedances by changing the DC bias across them -- even for audio power amp kinds of things, or in place of a variac for AC control!). But do get good quality .1uf ceramics at 25v or so ratings for those. This chip draws serious current spikes, so use good bypassing with a decent sized electrolytic (maybe even solid tantalum) with a smaller ceramic across it, right at the chip, it will drive the fets better that way too. Beware inductive coupling from the large fet currents into the oscillator/timing parts as well -- that one cost me a few fets when the oscillator went nuts due to that. A PCB layout change was required to really kill that problem -- I was accidentally making a transformer between the high current traces and the low level stuff that messed things up. It wasn't capacitive coupling! It was magnetic! Ow! That one took some head scratching to find and fix.
Most of this stuff you can't just brute force to solve burnup problems. Going to bigger fets means slower switching, during which time losses are high if everything else isn't perfect -- and in real life, it's never perfect. So going to huge output devices just moves problems to elsewhere without solving them. Since the fets are where the rubber meets the road (and the power source is very powerful, and the load can act like a short circuit), they are the thing that goes out, often taking the driver with them. I have actually taken out more drivers than fets when a high current glitch fed back into the driver via the capacities of the fet, so getting the fets sized right is more important than you might think at first.
One thing you need to discover is the real parameters of your load, both with and without a bleeder on the HV stack. You'll want the data with the stack connected, as it's parasitic C load will lower the resonant frequency of the secondary (usually), and in real life it will be there, so that's the numbers you need to know -- you'll be tuning the oscillator to near that frequency, probably a little below that to see an inductive load. I have good luck tuning there, or 1/3 that frequency so the 3rd harmonic of the sq wave drive doesn't see a capacitive short circuit, but often as not, the transformer resonance will be too low for that to be practical -- when I did that I was using a very high resonance transformer without a lot of secondary turns.
There are dodges and tricks to help that, but you really can't force it that much without just creating a lot of loss someplace else -- this is a finesse thing, not a brute force thing (even though the eventual output is brutish indeed!). I often find out that a small bleeder load (a few watts tops) tames down weird ringing effects at the secondary that are due to stray L's and C's in it. If you could draw the true equivalent circuit of one of these HV transformers, you'd see a lot more L's and C's and R's in it than the simple thing most people have in mind when they think "transformer" -- and they all matter in this work.
I find, for what it's worth, that a few watts (not a lot, but some) load on the stack helps get a better picture of things, and that actually low loads can be harder on drivers than big ones -- you are driving the transformer resonant circuit stored energy and it's worse when it's all in the transformer rather than the load damping some of that stuff out. To see the secondary waveform, I just place the probe near it -- an inch or so. This keeps the scope and prove alive (most won't take that kind of thing direct) and though it's a little differentiated signal, it's enough to see what's going on. Pretty much all the resonance issues are in the secondary winding -- it has the highest L and C both.
I almost always tune for least loss power at no load here, and that seems to be working out very well -- haven't fried a power supply in awhile now. Without a bleeder on the stack, you should be able to get into the low milliamps draw from the fet main supply rails. If you can't -- find out why and fix it! Only then go for real power output. If you have something like a shorted turn in the transformer, well, that's very sad, but you'll have to fix it before proceeding. You should see the no load current draw go up more or less linear with the fet rail volts. If it goes up faster than linear, you're magnetics are going into saturation...not good and it won't be very reliable doing that. Most transformers will look like a pretty high Q resonant circuit, unless there's a lot of leakage L or R someplace (a little of that is GOOD, too much is BAD).
With medium sized fets, you can look at how well the drain of a lower fet in the bridge gets to ground and see the current being drawn vs time on a scope nicely, using the fet on-resistance as a current sensing resistor -- no good for absolute numbers, but good to see the current waveform shape. I find this really helpful in tuning, along with watching the gate waveform on the same fet (dual trace scope). As I usually tune for a slightly inductive load, what I see when things are right is that the instant the fet I'm watching is turned off, the drain flies all the way to the other rail (caught by the other fets freewheeling diode), so when the other fet turns on after the dead time, it's already got zero (or even 1 diode drop negative) volts across it -- that's a nicely low-loss situation. This will change some with output loading of course, but it's what you are shooting for with fets (with IGBTS the problems are all different, and this tuning ruins them quick due to getting outside their safe operating area during the turnoff, which they aren't so good at, being basically transistors with storage times). I've not yet had to use extra diodes here, when things are right, the body diode of a modern fet seems to do well enough.
I'm not going to say it's a bad idea, though, just that you may not actually need it. Here, my fets don't even get warm on a 1" sq heatsink each at no load...at real high loads they do need heatsinks due to voltage drops during on time, but not at idle. If you can't get to there, it'll never fly in real life. Not as fun as full power testing, but it's the way to get it there.
At the drain, you'll see either a ringing during the on time (a small signal, the fet is on and a decently low resistance, but you can still see stuff if you crank the scope gain up). If you see a current ramp up during the on time, that's nice if it's linear. If it's going parabolic ally up at the end of the on time -- you are saturating your transformer and trying to cheat mother nature -- we all know how that turns out. Getting the circuit to match the magnetics is key, however you get there. It's usually easier to do the circuit, because changing the magnetics means a lot more work in general. Turning a fet off while the current is high means a lot of switching loss during the turnoff time as well.
In the event your magnetics have a too-low resonant frequency for you (because maybe the AC side caps in the stack are small and you're concerned about voltage losses there) there is a popular dodge for that -- wire a high quality (large in size but low in inductance) inductor across the primary to raise the resonance you see. You can only take this so far, however. You're not going to easily get an octave out of that trick (which would require cutting the inductance of the primary by factor 4), and losses due to the secondary resistance are going to go up, as well as losses in the primary and the inductor you add there -- the secondary winding still has its resonance in the same place, after all. It's kind of trying to cheat, but for small changes it's workable -- but not octaves. Once you have done this, you can expect to see more quiescent current at no load due to winding losses, of course, and at some point there will be temperature rise in the magnetics that may be too much for you. Most of these cores, however, are at their best when on the warm side -- the magnetic properties are somewhat temperature sensitive. so running at 50-80 C isn't all that bad for most of them, and indeed might be better than "cold" -- depends on the ferrite used. Ideally, you'd want to be in the range of 25-50khz for a large supply, I've gone up to 70khz for smaller ones when the transformer allowed that. (which is about the limit of this chip anyway) But you have to deal with what transformer you have (or are willing to make).
For what it's worth, I've run mine with and without the series C to the transformer primary without any noticeable changes, this particular circuit, and good fets just doesn't seem to have an imbalance issue at all -- nice. However, a slick trick to do is to make a series resonant LC at your tuning frequency, instead of just a C there (which means you can use a smaller C too, but it has to be a good one with low ESR). The thing that helps with is providing a higher impedance, inductive, to the high harmonics of the fast rising square wave, which can cut switching losses in the fets way down -- and also protect them if for some reason you get way off tune because off the resonance of the series LC, the load impedance goes up so the thing can't draw as much current through the fets. I have not had to do this here, as I wind my own transformers mostly, and get a similar effect by controlling the leakage inductance between primary and secondary, for example, winding at least part of the primary on the leg of the core on the other side from the secondary. Learned that trick analyzing some Glassman output magnetics, and it really works nicely if done right. This turns out simpler (less parts) and more efficient than the multiple L's and C's in the output circuit. The Wallis transformer I'm currently messing with doesn't do this, but has plenty of leakage L and a fairly complex impedance vs frequency plot for one of these, but I've not taken it far enough apart to discover why yet. At any rate, the fact that it has odd frequencies where it acts like an open circuit is actually a good thing as it cuts power losses in the driver on the fast edges.
But in general, what you are shooting for here is to get the fets to switch just as the magnetics resonance is trying to do that anyway -- then the fets just hold the state after the switch. You don't want to go so slow that the magnetics are trying to really switch HARD at that instant, because then the fet that's turning off is switching at high current, which is lossy, and makes the drain waveform have so much dv/dt that you get glitching back on the gate, which turns into a downhill spiral real quick and lets out the magic blue smoke quite effectively.
I have also (for some transformers, but not all) actually gotten a situation where when the bottom fet turns off the drain just goes to the middle for the deadtime, and then the top fet turns on and drags it to the top rail, and that worked out well too. But it's rare, and quite difficult to stay tuned on to.
What you very much don't want to see is backing and forthing during the deadtime -- that's pure poison for the fets. It can be caused by too high an R in the fet gate as well as by plain old mis tuning. That glitch on the gate drive can keep a fet in its linear range, neither on nor off, dissipating serious power -- and they go boom. I find, by the way, that I can do most of this tuning with something like 24v on the fet rails, then just watch carefully as I crank the rails up to the "real" operating voltage range, then back down for any tuning needed to make that area happy. That makes it easy to do, and around here high current 24v isolated supplies are easier to put hands on than big fat isolation transformers at mains voltages. This keeps me from getting killed trying to adjust things while they are at hazardous voltages as well.
I will sometimes see some sinusoidal ringing on the low fet drain during on time due to some higher order resonance in the magnetics. I've not had it make trouble, but then I do tune for the nice waveform on turn-off and that takes this into account most times.
I'll have to put CliffS name in here, in case he's watching. His word is THE word on this stuff, and if we run into any real troubles here, we can hope he'll bail us out a bit. That book on Switching Power Supply Design by Abraham I Pressman is hard to beat as well -- nothing in it is untrue in my experience with switchers, and a little was even new to me. That doesn't happen real often, so I'm real grateful for JohnF telling us about it.
- PCB layout in trax/dos/linux software
Here's the layout I wound up with after a couple of tries. Fets across the top so they all go on the same heatsink and the wiring is "tight". I stiffened up the high current tracks with wire, and use an 82 uF bypass electrolytic across the main rails. One way of knowing if you're tuning right is that thing gets HOT if you aren't. Any farther away is too far away for that cap to be.
Note the ground rail at the bottom isn't wired to the main rail minus -- that's on purpose so I could insert current sensing there. I had to add a wire from the cap (on the right) to the + rail for the fets (center top) because of the limitations of a single sided PCB (made here). I have a trimpot for oscillator tuning, and a series R in that so the pot isn't too wide a tuning range and hard to adjust. For what it's worth, I found using a super-high quality silver mica timing cap was a bad thing, and a crummier ceramic actually works out better. Go figure. I used a 3 terminal 15 volt regulator for the chip to keep the chip cooler. Don't know how important that would be in yours, but it helps here.
Posting as just me, not as the forum owner. Everything I say is "in my opinion" and YMMV -- which should go for everyone without saying.